Difference between revisions of "Abit FU3 Version 2"
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{{DISPLAYTITLE:Abit FU3 Ver.2}} | {{DISPLAYTITLE:Abit FU3 Ver.2}} | ||
− | Despite listing support for up to 256kb cache and 32MB of system RAM, the board only seems to support 128kb cache and 16MB DRAM without becoming unstable. This behaviour has also been exhibited on boards using the | + | Despite listing support for up to 256kb cache and 32MB of system RAM, the board only seems to support 128kb cache and 16MB DRAM without becoming unstable. This behaviour has also been exhibited on boards using the PEAK/DM chipset. Newer revisions of the board may have BIOS and hardware support for Cyrix 486DLC type chips. The CHIPs PEAK/DM chipset provides brisk main memory performance, but sadly the bank interleave mode was not implemented on this motherboard. |
[[image:Silicon_Star_FU3.JPG|800px]] | [[image:Silicon_Star_FU3.JPG|800px]] |
Revision as of 13:26, 23 December 2015
Despite listing support for up to 256kb cache and 32MB of system RAM, the board only seems to support 128kb cache and 16MB DRAM without becoming unstable. This behaviour has also been exhibited on boards using the PEAK/DM chipset. Newer revisions of the board may have BIOS and hardware support for Cyrix 486DLC type chips. The CHIPs PEAK/DM chipset provides brisk main memory performance, but sadly the bank interleave mode was not implemented on this motherboard.
Processor |
80386DX |
Processor Speed |
25/33/40MHz |
Chip Set |
Unidentified |
Video Chip Set |
None |
Maximum Onboard Memory |
32MB |
Maximum Video Memory |
None |
Cache |
32/64/128/256KB |
BIOS |
AMI |
Dimensions |
330mm x 218mm |
I/O Options |
None |
NPU Options |
80387DX/3167 |
CONNECTIONS | |||
Purpose | Location | Purpose | Location |
Turbo LED |
D4 |
Turbo switch |
J50 |
Speaker |
J18 |
Reset switch |
J51 |
Power LED & keylock |
J19 |
External battery |
JP2 |
USER CONFIGURABLE SETTINGS | |||
Function | Label | Position | |
� |
Factory configured - do not alter |
J21 |
Open |
� |
Monitor type select monochrome |
J23 |
Open |
Monitor type select color |
J23 |
Closed | |
� |
CMOS memory normal operation |
J42 |
Pins 2 & 3 closed |
CMOS memory clear |
J42 |
Pins 1 & 2 closed | |
� |
Factory configured - do not alter |
JP10 |
Unidentified |
� |
Factory configured - do not alter |
JP11 |
Unidentified |
� |
Factory configured - do not alter |
JP30 |
Closed |
DRAM CONFIGURATION | ||
Size | Bank 0 | Bank 1 |
1MB |
(4) 256K x 9 |
None |
2MB |
(4) 256K x 9 |
(4) 256K x 9 |
4MB |
(4) 1M x 9 |
None |
8MB |
(4) 1M x 9 |
(4) 1M x 9 |
16MB |
(4) 4M x 9 |
None |
32MB |
(4) 4M x 9 |
(4) 4M x 9 |
CACHE CONFIGURATION | |||
Size | Bank 0 | Bank 1 | TAG |
32KB |
(4) 8K x 8 |
None |
(1) 8K x 8 |
64KB |
(4) 8K x 8 |
(4) 8K x 8 |
(2) 16K x 4 |
128KB |
(4) 32K x 8 |
None |
(1) 32K x 8 |
256KB |
(4) 32K x 8 |
(4) 32K x 8 |
(2) 64K x 4 |
Note: The location of banks 0 & 1 and TAG are unidentified. |
CACHE JUMPER CONFIGURATION | ||||
Size | J26 | J27 | J28 | J29 |
32KB |
Pins 1 & 2 closed |
Open |
Open |
Closed |
64KB |
Pins 1 & 2 closed |
Closed |
Open |
Closed |
128KB |
Pins 2 & 3 closed |
Closed |
Open |
Closed |
256KB |
Pins 2 & 3 closed |
Closed |
Closed |
Open |
CACHE JUMPER CONFIGURATION (CON'T) | |||||
Size | J33 | J34 | J35 | J36 | J37 |
32KB |
Closed |
Open |
2 & 3 |
2 & 3 |
2 & 3 |
64KB |
Closed |
1 & 2 |
Open |
2 & 3 |
2 & 3 |
128KB |
Open |
1 & 2 |
Open |
1 & 2 |
1 & 2 |
256KB |
Open |
1 & 2 |
1 & 2 |
1 & 2 |
1 & 2 |
Note: Pins designated should be in the closed position. |
CACHE JUMPER CONFIGURATION (CON'T) | ||||
Size | J38 | J39 | J41 | J52 |
32KB |
Open |
Pins 2 & 3 closed |
Open |
Pins 1 & 2 closed |
64KB |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
Open |
Pins 1 & 2 closed |
128KB |
Pins 2 & 3 closed |
Pins 2 & 3 closed |
Pins 1 & 2 closed |
Pins 2 & 3 closed |
256KB |
Pins 2 & 3 closed |
Pins 1 & 2 closed |
Pins 1 & 2 closed |
Pins 2 & 3 closed |